Analog Delay Cell (25 ps Step)
Designed a differential CML-based delay cell achieving 25 ps precision under SMIC 180 nm.
MRAM-based TRNG Circuit
Modeled spin-transfer torque MRAM for true random number generation using Verilog-A.
Smart Locker System
Built an STM32-based smart locker with accelerometer-triggered security and environmental monitoring.